Design and implementation of a frequency synthesizer using PLL

Please use this identifier to cite or link to this item: http://localhost:80/xmlui/handle/123456789/7401

Full metadata record

DC Field	Value	Language
dc.contributor.author	Adak, Asima	-
dc.date.accessioned	2023-03-16T07:56:03Z	-
dc.date.available	2023-03-16T07:56:03Z	-
dc.date.issued	2022-06	-
dc.identifier.issn	2347 – 5161	-
dc.identifier.uri	http://172.16.0.4:8085/heritage/handle/123456789/7401	-
dc.description	DOI: https://doi.org/10.14741/ijcet/v.12.3.5	en_US
dc.description.abstract	An investigation has been made to find the new frequency from a reference frequency such is done for the beneficial of day-to-day rapid increase in the technology and its uses. The effect of such is derived from the comparison of analog circuits and digital circuits to find the better result. A software analysis is also done to verify the result. Mainly for the regular use of wireless technology this work is done and compared for the analysis of better result. Phase lock loop is used to get the better frequency response from the crystal oscillator used as a reference frequency. It is a very essential component for modern technology	en_US
dc.language.iso	en	en_US
dc.publisher	INPRESSCO	en_US
dc.relation.ispartofseries	Vol : 12;No: 3	-
dc.subject	Phase lock loop	en_US
dc.subject	analog circuits	en_US
dc.subject	digital circuit	en_US
dc.subject	reference frequency	en_US
dc.title	Design and implementation of a frequency synthesizer using PLL	en_US
dc.title.alternative	(In) International Journal of Current Engineering and Technology	en_US
dc.type	Article	en_US
Appears in Collections:	Electronics and Communication Engineering (Publications)

Files in This Item:

File	Description	Size	Format
Paper5223-228.pdf		388.58 kB	Adobe PDF	View/Open