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Please use this identifier to cite or link to this item: http://localhost:80/xmlui/handle/123456789/4853
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dc.date.accessioned2021-03-30T10:12:08Z-
dc.date.available2021-03-30T10:12:08Z-
dc.date.issued2021-01-
dc.identifier.urihttp://172.16.0.4:8085/heritage/handle/123456789/4853-
dc.language.isoen_USen_US
dc.publisherIUP Publicationsen_US
dc.relation.ispartofseriesVol. XIV;No. 1-
dc.subjectTHE IUP JOURNAL OF ELECTRICAL & ELECTRONICS ENGINEERINGen_US
dc.subject2021en_US
dc.subjectJanuaryen_US
dc.subjectFocusen_US
dc.subjectDesign and Performance Analysis of SRAM Cellsen_US
dc.subjectANew ArchitecturalApproach to VLCApplicationen_US
dc.subject4-Bit Ripple Carry Adder Using Area-Efficient Full Adder in CMOS Technologyen_US
dc.titleTHE IUP JOURNAL OF ELECTRICAL & ELECTRONICS ENGINEERINGen_US
dc.typeImageen_US
Appears in Collections:Alerting of New Journals (AEIE)

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